Skip to content
charmOS docs

PCI

include/drivers/pci.h View source View on GitHub

Structs

Section titled “Structs”

pci_device

Section titled “pci_device”
struct pci_device (10 fields) source
§ struct device device
§ uint8_t bus
§ uint8_t dev
§ uint8_t function
§ uint16_t vendor_id
§ uint16_t device_id
§ uint8_t class_code
§ enum lock_subclass subclass
§ uint8_t prog_if
§ uint8_t revision

pci_driver

Section titled “pci_driver”
struct pci_driver (5 fields) source
§ struct device_driver driver
§ uint8_t class_code
§ enum lock_subclass subclass
§ uint8_t prog_if
§ uint16_t vendor_id

pci_msix_table_entry

Section titled “pci_msix_table_entry”
struct pci_msix_table_entry (4 fields) source
§ uint32_t msg_addr_low
§ uint32_t msg_addr_high
§ uint32_t msg_data
§ uint32_t vector_ctrl

Bit 0 = Mask

pci_msix_cap

Section titled “pci_msix_cap”
struct pci_msix_cap (5 fields) source
§ uint8_t cap_id

0x0

§ uint8_t next_ptr

0x1

§ uint16_t msg_ctl

0x2

§ uint32_t table_offset_bir

0x4

§ uint32_t pba_offset_bir

0x8

Unions

Section titled “Unions”

pci_command_reg

Section titled “pci_command_reg”
union pci_command_reg (2 fields) source
§ uint16_t value
§ struct
§ uint16_t io_space : 1

Bit 0

§ uint16_t memory_space : 1

Bit 1

§ uint16_t bus_master : 1

Bit 2

§ uint16_t special_cycles : 1

Bit 3

§ uint16_t mem_write_inv : 1

Bit 4

§ uint16_t vga_snoop : 1

Bit 5

§ uint16_t parity_error : 1

Bit 6

§ uint16_t reserved0 : 1

Bit 7

§ uint16_t serr_enable : 1

Bit 8

§ uint16_t fast_back : 1

Bit 9

§ uint16_t interrupt_disable : 1

Bit 10

§ uint16_t reserved1 : 5

Bits 11–15

Functions

Section titled “Functions”

pci_read_config16

Section titled “pci_read_config16”
uint16_t pci_read_config16(
    uint8_t bus,
    uint8_t device,
    uint8_t function,
    uint8_t offset
)
source

pci_read_config8

Section titled “pci_read_config8”
uint8_t pci_read_config8(
    uint8_t bus,
    uint8_t device,
    uint8_t function,
    uint8_t offset
)
source

pci_write_config16

Section titled “pci_write_config16”
void pci_write_config16(
    uint8_t bus,
    uint8_t device,
    uint8_t function,
    uint8_t offset,
    uint16_t value
)
source

pci_config_address

Section titled “pci_config_address”
uint32_t pci_config_address(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t offset
)
source

pci_read

Section titled “pci_read”
uint32_t pci_read(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t offset
)
source

pci_read_word

Section titled “pci_read_word”
uint16_t pci_read_word(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t offset
)
source

pci_read_byte

Section titled “pci_read_byte”
uint8_t pci_read_byte(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t offset
)
source

pci_write

Section titled “pci_write”
void pci_write(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t offset,
    uint32_t value
)
source

pci_write_word

Section titled “pci_write_word”
void pci_write_word(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t offset,
    uint16_t value
)
source

pci_write_byte

Section titled “pci_write_byte”
void pci_write_byte(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t offset,
    uint8_t value
)
source

pci_class_name

Section titled “pci_class_name”
const char * pci_class_name(uint8_t class_code, uint8_t subclass)
source

pci_scan_devices

Section titled “pci_scan_devices”
void pci_scan_devices(
    struct pci_device **devices_out,
    uint64_t *count_out
)
source

pci_read_bar

Section titled “pci_read_bar”
uint32_t pci_read_bar(
    uint8_t bus,
    uint8_t device,
    uint8_t function,
    uint8_t bar_index
)
source

pci_enable_msix

Section titled “pci_enable_msix”
void pci_enable_msix(uint8_t bus, uint8_t slot, uint8_t func)
source

pci_enable_msix_on_core

Section titled “pci_enable_msix_on_core”
void pci_enable_msix_on_core(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t vector,
    uint32_t apic_id
)
source

pci_init_devices

Section titled “pci_init_devices”
void pci_init_devices(struct pci_device *devices, uint64_t count)
source

pci_find_capability

Section titled “pci_find_capability”
uint8_t pci_find_capability(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint8_t cap_id
)
source

pci_program_msix_entry

Section titled “pci_program_msix_entry”
void pci_program_msix_entry(
    uint8_t bus,
    uint8_t slot,
    uint8_t func,
    uint32_t table_index,
    uint8_t vector,
    uint32_t apic_id
)
source

Macros

Section titled “Macros”

PCI_CLASS_MASS_STORAGE

Section titled “PCI_CLASS_MASS_STORAGE”
#define PCI_CLASS_MASS_STORAGE 0x01
source

PCI_SUBCLASS_NVM

Section titled “PCI_SUBCLASS_NVM”
#define PCI_SUBCLASS_NVM 0x08
source

PCI_PROGIF_NVME

Section titled “PCI_PROGIF_NVME”
#define PCI_PROGIF_NVME 0x02
source

PCI_DEV_REGISTER

Section titled “PCI_DEV_REGISTER”
#define PCI_DEV_REGISTER(n, cc, sc, pi, vi, init)
source
Expansion
#define PCI_DEV_REGISTER(n, cc, sc, pi, vi, init) \
    LINKER_SECTION_OBJECT(struct pci_driver, pci_devices) \
    pci_device_##n = {.driver.name = #n, \
                      .class_code = cc, \
                      .subclass = sc, \
                      .prog_if = pi, \
                      .vendor_id = vi, \
                      .driver.probe = init};

PCI_BAR0

Section titled “PCI_BAR0”
#define PCI_BAR0 0x10
source

PCI_BAR1

Section titled “PCI_BAR1”
#define PCI_BAR1 0x14
source

PCI_BAR2

Section titled “PCI_BAR2”
#define PCI_BAR2 0x18
source

PCI_BAR3

Section titled “PCI_BAR3”
#define PCI_BAR3 0x1C
source

PCI_BAR4

Section titled “PCI_BAR4”
#define PCI_BAR4 0x20
source

PCI_BAR5

Section titled “PCI_BAR5”
#define PCI_BAR5 0x24
source

PCI_CAP_PTR

Section titled “PCI_CAP_PTR”
#define PCI_CAP_PTR 0x34
source

PCI_CAP_ID_MSIX

Section titled “PCI_CAP_ID_MSIX”
#define PCI_CAP_ID_MSIX 0x11
source

PCI_CONFIG_ADDRESS

Section titled “PCI_CONFIG_ADDRESS”
#define PCI_CONFIG_ADDRESS 0xCF8
source

PCI_CONFIG_DATA

Section titled “PCI_CONFIG_DATA”
#define PCI_CONFIG_DATA 0xCFC
source

PCI_INTERRUPT_LINE

Section titled “PCI_INTERRUPT_LINE”
#define PCI_INTERRUPT_LINE 0x3C
source

PCI_PROG_IF

Section titled “PCI_PROG_IF”
#define PCI_PROG_IF 0x09
source

pci_log

Section titled “pci_log”
#define pci_log(log_level, fmt, ...)
source
Expansion
#define pci_log(log_level, fmt, ...) \
    log(LOG_SITE(pci), LOG_HANDLE(pci), log_level, fmt, ##__VA_ARGS__)