AHCI

include/drivers/ahci.h View source View on GitHub

Structs

ahci_fis_reg_h2d

struct ahci_fis_reg_h2d (19 fields)

NOTE

offsets and sizes in kernel/drivers/ahci/layout.c

§ uint8_t fis_type

0x27

§ uint8_t pmport : 4

§ uint8_t reserved1 : 3

§ uint8_t c : 1

§ uint8_t command

§ uint8_t featurel

§ uint8_t lba0

§ uint8_t lba1

§ uint8_t lba2

§ uint8_t device

§ uint8_t lba3

§ uint8_t lba4

§ uint8_t lba5

§ uint8_t featureh

§ uint8_t countl

§ uint8_t counth

§ uint8_t icc

§ uint8_t control

§ uint8_t reserved2[4]

ahci_fis_reg_d2h

struct ahci_fis_reg_d2h (19 fields)

§ uint8_t fis_type

FIS_TYPE_REG_D2H

§ uint8_t pmport : 4

Port multiplier

§ uint8_t rsv0 : 2

Reserved

§ uint8_t i : 1

Interrupt bit

§ uint8_t rsv1 : 1

Reserved

§ uint8_t status

Status register

§ uint8_t error

Error register

§ uint8_t lba0

LBA low register, 7:0

§ uint8_t lba1

LBA mid register, 15:8

§ uint8_t lba2

LBA high register, 23:16

§ uint8_t device

Device register

§ uint8_t lba3

LBA register, 31:24

§ uint8_t lba4

LBA register, 39:32

§ uint8_t lba5

LBA register, 47:40

§ uint8_t rsv2

Reserved

§ uint8_t countl

Count register, 7:0

§ uint8_t counth

Count register, 15:8

§ uint8_t rsv3[2]

Reserved

§ uint8_t rsv4[4]

Reserved

ahci_prdt_entry

struct ahci_prdt_entry (6 fields)

§ uint32_t dba

Data base address

§ uint32_t dbau

Upper 32-bits of DBA

§ uint32_t reserved

§ uint32_t dbc : 22

Byte count (0-based)

§ uint32_t reserved2 : 9

§ uint32_t i : 1

Interrupt on completion

ahci_cmd_table

struct ahci_cmd_table (4 fields)

§ uint8_t cfis[AHCI_CMD_TABLE_FIS_SIZE]

Command FIS (host to device)

§ uint8_t acmd[AHCI_CMD_TABLE_ATAPI_SIZE]

ATAPI command

§ uint8_t reserved[48]

§ struct ahci_prdt_entry prdt_entry[]

up to 65535

ahci_full_port

struct ahci_full_port (6 fields)

§ struct ahci_port cc_mem_io *port

§ void *cmd_list_base

§ void *fis

§ struct ahci_cmd_table **cmd_tables

§ struct ahci_cmd_header **cmd_hdrs

§ volatile atomic_uint32_t slot_bitmap

ahci_port

struct ahci_port (19 fields)

§ uint32_t clb

Command List Base (lower 32 bits)

§ uint32_t clbu

Command List Base (upper 32 bits)

§ uint32_t fb

FIS Base (lower 32 bits)

§ uint32_t fbu

FIS Base (upper 32 bits)

§ uint32_t is

Interrupt Status

§ uint32_t ie

Interrupt Enable

§ uint32_t cmd

Command and Status

§ uint32_t rsv0

Reserved

§ uint32_t tfd

Task File Data

§ uint32_t sig

Signature

§ uint32_t ssts

SATA Status

§ uint32_t sctl

SATA Control

§ uint32_t serr

SATA Error

§ uint32_t sact

SATA Active

§ uint32_t ci

Command Issue

§ uint32_t sntf

SATA Notification

§ uint32_t fbs

FIS-based Switching

§ uint32_t rsv1[11]

Reserved

§ uint32_t vendor[4]

vendor specific

ahci_device

struct ahci_device (11 fields)

one controller

§ uint8_t type

Device type

§ uint32_t signature

Device signature

§ uint32_t sectors

Total sectors (for disks)

§ uint16_t sector_size

Sector size in bytes

§ struct ahci_controller cc_mem_io *ctrl

§ uint64_t port_count

§ uint16_t io_statuses[AHCI_MAX_PORTS][32]

§ struct ahci_request *io_requests[AHCI_MAX_PORTS][32]

§ irq_t irq_num

§ struct spinlock lock

§ struct ahci_full_port regs[32]

Pointer to port registers

ahci_disk

struct ahci_disk (3 fields)

one disk

§ struct ahci_device *device

§ uint32_t port

§ uint16_t sector_size

Sector size in bytes

ahci_controller

struct ahci_controller (13 fields)

§ uint32_t cap

Host Capabilities

§ uint32_t ghc

Global Host Control

§ uint32_t is

Interrupt Status

§ uint32_t pi

Ports Implemented

§ uint32_t vs

Version

§ uint32_t ccc_ctl

Command Completion Coalescing Control

§ uint32_t ccc_ports

CCC Ports

§ uint32_t em_loc

Enclosure Management Location

§ uint32_t em_ctl

Enclosure Management Control

§ uint32_t cap2

Extended Host Capabilities

§ uint32_t bohc

BIOS/OS Handoff Control

§ uint8_t rsv[0xA0 - 0x2C]

§ uint8_t vendor[0x100 - 0xA0]

ahci_cmd_header

struct ahci_cmd_header (14 fields)

§ uint8_t cfl : 5

Command FIS length in DWORDS, 2 ~ 16

§ uint8_t a : 1

ATAPI

§ uint8_t w : 1

Write, 1: H2D, 0: D2H

§ uint8_t p : 1

Prefetchable

§ uint8_t r : 1

Reset

§ uint8_t b : 1

BIST

§ uint8_t c : 1

Clear busy upon R_OK

§ uint8_t rsv0 : 1

Reserved

§ uint8_t pmp : 4

Port multiplier port

§ uint16_t prdtl

Physical region descriptor table length in entries

§ uint32_t prdbc

Physical region descriptor byte count transferred

§ uint32_t ctba

Command table descriptor base address

§ uint32_t ctbau

Command table descriptor base address upper 32 bits

§ uint32_t rsv1[4]

Reserved

ahci_request

struct ahci_request (14 fields)

§ struct event evt

§ bool has_waiter

§ uint32_t port

§ uint32_t slot

§ uint64_t lba

§ void *buffer

§ uint64_t size

§ uint64_t sector_count

§ bool write

§ bool trigger_completion

§ volatile bool done

§ int status

§ void (*on_complete)(struct ahci_request *)

§ void *user_data

Functions

ahci_discover

void ahci_discover(struct ahci_controller cc_mem_io *ctrl)

ahci_find_slot

uint32_t ahci_find_slot(struct ahci_full_port *port)

ahci_setup_controller

struct ahci_disk * ahci_setup_controller(
    struct ahci_controller cc_mem_io *ctrl,
    uint32_t *d_cnt
)

ahci_identify

void ahci_identify(struct ahci_disk *disk)

ahci_prepare_command

void ahci_prepare_command(
    struct ahci_full_port *port,
    uint32_t slot,
    bool write,
    uint8_t *buf,
    uint64_t size
)

ahci_setup_fis

void ahci_setup_fis(
    struct ahci_cmd_table *cmd_tbl,
    uint8_t command,
    bool is_atapi
)

ahci_send_command

void ahci_send_command(
    struct ahci_disk *disk,
    struct ahci_full_port *port,
    struct ahci_request *req
)

ahci_discover_device

struct ahci_disk * ahci_discover_device(
    uint8_t bus,
    uint8_t device,
    uint8_t function,
    uint32_t *out_disk_count
)

ahci_write_sector

bool ahci_write_sector(
    struct block_device *disk,
    uint64_t lba,
    const uint8_t *in_buf,
    uint16_t cnt
)

ahci_write_sector_async

bool ahci_write_sector_async(
    struct block_device *disk,
    uint64_t lba,
    uint8_t *in_buf,
    uint16_t count,
    struct ahci_request *req
)

ahci_read_sector

bool ahci_read_sector(
    struct block_device *disk,
    uint64_t lba,
    uint8_t *out_buf,
    uint16_t cnt
)

ahci_read_sector_async

bool ahci_read_sector_async(
    struct block_device *disk,
    uint64_t lba,
    uint8_t *buf,
    uint16_t count,
    struct ahci_request *req
)

ahci_read_sector_wrapper

bool ahci_read_sector_wrapper(
    struct block_device *disk,
    uint64_t lba,
    uint8_t *buf,
    uint64_t cnt
)

ahci_read_sector_async_wrapper

bool ahci_read_sector_async_wrapper(
    struct block_device *disk,
    uint64_t lba,
    uint8_t *buf,
    uint64_t cnt,
    struct ahci_request *req
)

ahci_write_sector_wrapper

bool ahci_write_sector_wrapper(
    struct block_device *disk,
    uint64_t lba,
    const uint8_t *buf,
    uint64_t cnt
)

ahci_write_sector_async_wrapper

bool ahci_write_sector_async_wrapper(
    struct block_device *disk,
    uint64_t lba,
    const uint8_t *buf,
    uint64_t cnt,
    struct ahci_request *req
)

ahci_submit_bio_request

bool ahci_submit_bio_request(
    struct block_device *disk,
    struct bio_request *bio
)

ahci_do_coalesce

void ahci_do_coalesce(
    struct block_device *disk,
    struct bio_request *into,
    struct bio_request *from
)

ahci_should_coalesce

bool ahci_should_coalesce(
    struct block_device *disk,
    const struct bio_request *a,
    const struct bio_request *b
)

ahci_reorder

void ahci_reorder(struct block_device *disk)

ahci_create_generic

struct block_device * ahci_create_generic(struct ahci_disk *disk)

ahci_isr_handler

enum irq_result ahci_isr_handler(struct irq_context *ictx, void *ctx)

ahci_get_port

struct ahci_port cc_mem_io * ahci_get_port(
    struct ahci_device *dev,
    int n
)

ahci_print_wrapper

void ahci_print_wrapper(struct block_device *d)

Macros

AHCI_CMD_TIMEOUT_MS

#define AHCI_CMD_TIMEOUT_MS 5000

Data commands (read/write)

AHCI_IDENT_TIMEOUT_MS

#define AHCI_IDENT_TIMEOUT_MS 10000

Identify, flush cache, etc.

AHCI_RESET_TIMEOUT_MS

#define AHCI_RESET_TIMEOUT_MS 30000

Full controller reset or COMRESET

AHCI_CAP

#define AHCI_CAP 0x00

Host Capabilities

AHCI_GHC

#define AHCI_GHC 0x04

Global Host Control

AHCI_IS

#define AHCI_IS 0x08

Interrupt Status

AHCI_PI

#define AHCI_PI 0x0C

Ports Implemented

AHCI_VS

#define AHCI_VS 0x10

AHCI Version

AHCI_CCC_CTL

#define AHCI_CCC_CTL 0x14

Command Completion Coalescing Control

AHCI_CCC_PORTS

#define AHCI_CCC_PORTS 0x18

CCC Ports

AHCI_EM_LOC

#define AHCI_EM_LOC 0x1C

Enclosure Management Location

AHCI_EM_CTL

#define AHCI_EM_CTL 0x20

Enclosure Management Control

AHCI_CAP2

#define AHCI_CAP2 0x24

Host Capabilities Extended

AHCI_BOHC

#define AHCI_BOHC 0x28

BIOS/OS Handoff Control and Status

AHCI_PORT_BASE

#define AHCI_PORT_BASE 0x100

Base offset for port registers

AHCI_PORT_SIZE

#define AHCI_PORT_SIZE 0x80

Size of each port register set

AHCI_MAX_PORTS

#define AHCI_MAX_PORTS 32

AHCI_MAX_SLOTS

#define AHCI_MAX_SLOTS 32

AHCI_PORT_CLB

#define AHCI_PORT_CLB 0x00

Command List Base Address

AHCI_PORT_CLBU

#define AHCI_PORT_CLBU 0x04

Command List Base Address Upper

AHCI_PORT_FB

#define AHCI_PORT_FB 0x08

FIS Base Address

AHCI_PORT_FBU

#define AHCI_PORT_FBU 0x0C

FIS Base Address Upper

AHCI_PORT_IS

#define AHCI_PORT_IS 0x10

Interrupt Status

AHCI_PORT_IE

#define AHCI_PORT_IE 0x14

Interrupt Enable

AHCI_PORT_CMD

#define AHCI_PORT_CMD 0x18

Command and Status

AHCI_PORT_TFD

#define AHCI_PORT_TFD 0x20

Task File Data

AHCI_PORT_SIG

#define AHCI_PORT_SIG 0x24

Signature

AHCI_PORT_SSTS

#define AHCI_PORT_SSTS 0x28

SATA Status

AHCI_PORT_SCTL

#define AHCI_PORT_SCTL 0x2C

SATA Control

AHCI_PORT_SERR

#define AHCI_PORT_SERR 0x30

SATA Error

AHCI_PORT_SACT

#define AHCI_PORT_SACT 0x34

SATA Active

AHCI_PORT_CI

#define AHCI_PORT_CI 0x38

Command Issue

AHCI_PORT_SNTF

#define AHCI_PORT_SNTF 0x3C

SATA Notification

AHCI_DEV_NULL

#define AHCI_DEV_NULL 0

AHCI_DEV_SATA

#define AHCI_DEV_SATA 1

AHCI_DEV_BUSY

#define AHCI_DEV_BUSY BIT(30)

AHCI_DEV_DRDY

#define AHCI_DEV_DRDY 0x40

AHCI_DEV_SATAPI

#define AHCI_DEV_SATAPI 2

AHCI_DEV_SEMB

#define AHCI_DEV_SEMB 3

AHCI_DEV_PM

#define AHCI_DEV_PM 4

AHCI_CMD_TABLE_FIS_SIZE

#define AHCI_CMD_TABLE_FIS_SIZE 64

AHCI_CMD_TABLE_ATAPI_SIZE

#define AHCI_CMD_TABLE_ATAPI_SIZE 16

AHCI_MAX_PRDT_ENTRIES

#define AHCI_MAX_PRDT_ENTRIES 65535

AHCI_GHC_HR

#define AHCI_GHC_HR BIT(0)

AHCI_GHC_AE

#define AHCI_GHC_AE BIT(31)

AHCI_DET_NO_DEVICE

#define AHCI_DET_NO_DEVICE 0x0

AHCI_DET_PRESENT

#define AHCI_DET_PRESENT 0x3

AHCI_IPM_NO_INTERFACE

#define AHCI_IPM_NO_INTERFACE 0x0

AHCI_IPM_ACTIVE

#define AHCI_IPM_ACTIVE 0x1

AHCI_CMD_READ_DMA_EXT

#define AHCI_CMD_READ_DMA_EXT 0x25

AHCI_CMD_WRITE_DMA_EXT

#define AHCI_CMD_WRITE_DMA_EXT 0x35

AHCI_CMD_IDENTIFY

#define AHCI_CMD_IDENTIFY 0xEC

AHCI_CMD_ST

#define AHCI_CMD_ST BIT(0)

Start

AHCI_CMD_SUD

#define AHCI_CMD_SUD BIT(1)

Spin-Up Device

AHCI_CMD_FRE

#define AHCI_CMD_FRE BIT(4)

FIS Receive Enable

AHCI_CMD_FR

#define AHCI_CMD_FR BIT(14)

FIS Receive Running

AHCI_CMD_CR

#define AHCI_CMD_CR BIT(15)

Command List Running

AHCI_CMD_CLO

#define AHCI_CMD_CLO BIT(3)

Command List Override

AHCI_PORT_IPM_ACTIVE

#define AHCI_PORT_IPM_ACTIVE 1

AHCI_PORT_DET_PRESENT

#define AHCI_PORT_DET_PRESENT 3

AHCI_CMD_FLAGS_WRITE

#define AHCI_CMD_FLAGS_WRITE BIT(6)

AHCI_CMD_FLAGS_PRDTL

#define AHCI_CMD_FLAGS_PRDTL 1

FIS_TYPE_REG_H2D

#define FIS_TYPE_REG_H2D 0x27

FIS_REG_CMD

#define FIS_REG_CMD 0x80

LBA_MODE

#define LBA_MODE 0x40

CONTROL_BIT

#define CONTROL_BIT 0x80

AHCI_CMD_FLAGS_CFL_MASK

#define AHCI_CMD_FLAGS_CFL_MASK 0x1F

AHCI_CMD_FLAGS_W_BIT

#define AHCI_CMD_FLAGS_W_BIT 0x40

ahci_log

#define ahci_log(log_level, fmt, ...)

Expansion

#define ahci_log(log_level, fmt, ...) \
    log(LOG_SITE(ahci), LOG_HANDLE(ahci), log_level, fmt, ##__VA_ARGS__)

AHCI_PORT_OFFSET

#define AHCI_PORT_OFFSET(n)

Expansion

#define AHCI_PORT_OFFSET(n) (0x100 + (n) * 0x80)