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Assembly Routines

uint8_t inb(uint16_t port);
uint16_t inw(uint16_t port);
uint32_t inl(uint16_t port);
void insb(uint16_t port, void *addr, uint32_t count);
void insw(uint16_t port, void *addr, uint32_t count);
void insl(uint16_t port, void *addr, uint32_t count);
void outb(uint16_t port, uint8_t value);
void outw(uint16_t port, uint16_t value);
void outl(uint16_t port, uint32_t value);
void outsw(uint16_t port, void *addr, uint32_t count);
void outsb(uint16_t port, void *addr, uint32_t count);
void outsl(uint16_t port, void *addr, uint32_t count);
void mmio_write_64(void *address, uint64_t value);
void mmio_write_32(void *address, uint32_t value);
void mmio_write_16(void *address, uint16_t value);
void mmio_write_8(void *address, uint8_t value);
uint64_t mmio_read_64(void *address);
uint32_t mmio_read_32(void *address);
uint16_t mmio_read_16(void *address);
uint8_t mmio_read_8(void *address);
void write_cr8(uint64_t cr8);
uint64_t rdtsc(void);
void cpuid_count(uint32_t leaf, uint32_t subleaf, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
uint64_t read_cr4();
void write_cr4(uint64_t cr4);
uint32_t get_core_id(void);
bool are_interrupts_enabled();
void wrmsr(uint32_t msr, uint64_t value);
uint64_t rdmsr(uint32_t msr);
void io_wait(void);
void clear_interrupts(void);
void restore_interrupts(void);
void enable_interrupts(void);
void disable_interrupts(void);
void invlpg(uint64_t virt);
uint64_t read_cr3();
void write_cr3(uint64_t cr3);
void tlb_flush();
void cpu_relax(void);
void wait_for_interrupt(void);
void hcf(void);
int clz(uint8_t a);
void memory_barrier();
#define MSR_GS_BASE 0xC0000101