1/* @title: MMIO */
2#pragma once
3#include <compiler/core.h>
4#include <mem/page.h>
5#include <stddef.h>
6#include <stdint.h>
7#include <types/types.h>
8
9#define MMIO_RANGE_SIZE ((uintptr_t) PAGE_1GB * 64ULL)
10
11/* mmio_map is for device registers, and mmio_map_dma is for
12 * host memory that devices use as DMA (latter cacheable) */
13void cc_mem_io *mmio_map(paddr_t phys, size_t size);
14void mmio_unmap(void cc_mem_io *vaddr, size_t size);
15void *mmio_map_dma(paddr_t phys, size_t size);
16void mmio_init(void);
17
18static inline void mmio_write_64(volatile void cc_mem_io *address,
19 uint64_t value) {
20 asm volatile("movq %0, (%1)" : : "r"(value), "r"(address) : "memory");
21}
22
23static inline void mmio_write_32(volatile void cc_mem_io *address,
24 uint32_t value) {
25 asm volatile("movl %0, (%1)" : : "r"(value), "r"(address) : "memory");
26}
27
28static inline void mmio_write_16(volatile void cc_mem_io *address,
29 uint16_t value) {
30 asm volatile("movw %0, (%1)" : : "r"(value), "r"(address) : "memory");
31}
32
33static inline void mmio_write_8(volatile void cc_mem_io *address,
34 uint8_t value) {
35 asm volatile("movb %0, (%1)" : : "r"(value), "r"(address) : "memory");
36}
37
38static inline uint64_t mmio_read_64(volatile void cc_mem_io *address) {
39 uint64_t value;
40 asm volatile("movq (%1), %0" : "=r"(value) : "r"(address) : "memory");
41 return value;
42}
43
44static inline uint32_t mmio_read_32(volatile void cc_mem_io *address) {
45 uint32_t value;
46 asm volatile("movl (%1), %0" : "=r"(value) : "r"(address) : "memory");
47 return value;
48}
49
50static inline uint16_t mmio_read_16(volatile void cc_mem_io *address) {
51 uint16_t value;
52 asm volatile("movw (%1), %0" : "=r"(value) : "r"(address) : "memory");
53 return value;
54}
55
56static inline uint8_t mmio_read_8(volatile void cc_mem_io *address) {
57 uint8_t value;
58 asm volatile("movb (%1), %0" : "=r"(value) : "r"(address) : "memory");
59 return value;
60}
61